EpiNet 2017 is a software for control, analysis and optimization of epitaxial processes in production and development of LEDs, laser diodes, VCSEL, HEMT, HBT and other electronic and optoelectronic devices.
The software extracts key figures about wafers’ behavior during growth. In run-to-run control and in statistical process control, these key figures are used to improve yield and process capacity. EpiNet 2017 can be integrated into automated fab workflow providing from simple plain-text files to sophisticated live SECS/GEM integration.
EpiNet can be integrated horizontally and vertically into the fabs' logical structure using a wide range of protocols and interfaces, starting with low-end analog and digital signals over field buses to the most complex high level SEMI standards like SECS / GEM. This allows to connect to host systems such as MES (manufacturing execution system) and EES (equipment engineering system) using SECS / GEM and EDA / Interface A based on AIS FabLink.
EpiNet provides process-aware algorithms superior to any standard production control system. It can provide process information not available to the growth equipment like complex uniformity information on each wafer. Information which then is intelligently compacted into data that can be handled and analysed by statistical systems. Learn more about Advanced Process Control (APC) with EpiNet
Operator's view: PocketGuard
Wafer-to-Wafer view for post-run analysis
Color plots and line scans
Expert analysis: Transient view
Configuration panel: customized run type management
Alongside with our high-accuracy high-temperature nk database for Arsenides and Phosphides, which enables in-situ process control of layer thickness and composition at the same level of accuracy as XRD or PL, LayTec has developed an improved nk database for the III-Nitrides as part of the latest version of our EpiNet software. These high accuracy nk data in conjunction with Pyro 400 wafer temperature control opens a pathway to a more comprehensive and direct SPC of III-Nitride based manufacturing on Patterned Sapphire Substrates (PSS), silicon and, most importantly, on GaN wafers.
As an example, you can find some measurement results in the talk of Mr. Christoph Berger "In-situ metrology during growth of novel nitride-based semiconductor Bragg mirrors": Download the PDF of the talk.
LayTec's new release of the control and analysis software EpiNet 2016 offers completely new analysis features for our customers interested in high-accuracy statistical process control (SPC) of related device growth processes. Fig. 1 gives an example:
Fig. 1: Screenshot of the EpiNet 2016: data analysis of an InGaAsP/InP device structure on InP(001): the thickness of the three very thin InGaAsP layers in steps 2, 6, 10 is: 28.5 nm, 48.7 nm and 100.3 nm respectively. The table in the lower part of the figure gives the sequence of analysis functions for routine and automated SPC of this device growth process.
The thickness of very thin InGaAsP layers in a device stack grown in an AIXTRON Planetary Reactor® on InP(001) is determined by a well selected set of automated analysis operations. First, several InP layers are utilized for permanent in-situ high-accuracy re-calibration of all reflectance channels (yellow lines) in long lasting epi runs. Second, the lattice matching of the quaternary layers is verified by wafer bow analysis (not shown). Third, the composition of the quaternary material is determined at the thick InGaAsP layer in step #14. And finally, based on this information, the thickness of the thin InGaAsP layers in steps #2, #6 and #10 is accurately measured by double-wavelength thickness analysis.
For better understanding of growth processes, LayTec offers related training courses for process engineers and quality managers. To learn more, please contact firstname.lastname@example.org or call our sales engineer +49 30 89 00 55-0.